Rainbow Electronics W90N745CDG - Manual (Page 248)

W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
- 243 - Revision A2
BITS DESCRIPTIONS
[31:0] AUDIO_PDST_L[31:0]
32-bit play destination address length
The AUDIO_PDST_L[31:0] bits is read/write.
DMA destination current address (ACTL_PDSTC)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_PDSTC 0xFFF0_9020 RO DMA play destination current address 0x0000_0000
The value in ACTL_PDSTC is the DMA play destination current address, this register could only be
read by CPU.
BITS DESCRIPTIONS
[31:0] AUDIO_PDSTC[31:0]
32-bit play destination current address
The AUDIO_PDSTC[31:0] bits is read/write.
Audio controller playback status register (ACTL_PSR)
REGISTER ADDRESS R/W DESCRIPTION RESET VALUE
ACTL_PSR 0xFFF0_9024 R/W
Audio controller FIFO and DMA
status register for playback
0x0000_0004
31 30 29 28 27 26 25 24
AUDIO_PDSTC[31:24]
23 22 21 20 19 18 17 16
AUDIO_PDSTC[23:16]
15 14 13 12 11 10 9 8
AUDIO_PDSTC[15:8]
7 6 5 4 3 2 1 0
AUDIO_PDSTC[7:0]