Rainbow Electronics W90N745CDG User Manual
Page 109
W90N745CD/W90N745CDG
- 104 -
Continued.
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
CONTROL REGISTERS (44)
CAM12M
0xFFF0_3068
R/W
CAM12 Most Significant Word Register
0x0000_0000
CAM12L
0xFFF0_306C
R/W
CAM12 Least Significant Word Register
0x0000_0000
CAM13M
0xFFF0_3070
R/W
CAM13 Most Significant Word Register
0x0000_0000
CAM13L
0xFFF0_3074
R/W
CAM13 Least Significant Word Register
0x0000_0000
CAM14M
0xFFF0_3078
R/W
CAM14 Most Significant Word Register
0x0000_0000
CAM14L
0xFFF0_307C
R/W
CAM14 Least Significant Word Register
0x0000_0000
CAM15M
0xFFF0_3080
R/W
CAM15 Most Significant Word Register
0x0000_0000
CAM15L
0xFFF0_3084
R/W
CAM15 Least Significant Word Register
0x0000_0000
TXDLSA
0xFFF0_3088
R/W
Transmit Descriptor Link List Start
Address Register
0xFFFF_FFFC
RXDLSA
0xFFF0_308C
R/W
Receive Descriptor Link List Start
Address Register
0xFFFF_FFFC
MCMDR
0xFFF0_3090
R/W
MAC Command Register
0x0000_0000
MIID
0xFFF0_3094
R/W
MII Management Data Register
0x0000_0000
MIIDA
0xFFF0_3098
R/W
MII Management Control and Address
Register
0x0090_0000
FFTCR
0xFFF0_309C
R/W
FIFO Threshold Control Register
0x0000_0101
TSDR
0xFFF0_30A0
W
Transmit Start Demand Register
Undefined
RSDR
0xFFF0_30A4
W
Receive Start Demand Register
Undefined
DMARFC
0xFFF0_30A8
R/W
Maximum Receive Frame Control
Register
0x0000_0800
MIEN
0xFFF0_30AC
R/W
MAC Interrupt Enable Register
0x0000_0000
Status Registers (11)
MISTA
0xFFF0_30B0
R/W
MAC Interrupt Status Register
0x0000_0000
MGSTA
0xFFF0_30B4
R/W
MAC General Status Register
0x0000_0000
MPCNT
0xFFF0_30B8
R/W
Missed Packet Count Register
0x0000_7FFF
MRPC
0xFFF0_30BC
R
MAC Receive Pause Count Register
0x0000_0000
MRPCC
0xFFF0_30C0
R
MAC Receive Pause Current Count
Register
0x0000_0000
MREPC
0xFFF0_30C4
R
MAC Remote Pause Count Register
0x0000_0000
DMARFS
0xFFF0_30C8
R/W
DMA Receive Frame Status Register
0x0000_0000