Rainbow Electronics W90N745CDG - Manual (Page 351)

W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
- 347 - Revision A2
I
2
C Data Receive Register 0/1 (I
2
C_RxR 0/1)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
I 2 C_RXR0 0xFFF8_6010 R I 2 C Data Receive Register 0 0x0000_0000
I 2 C_RXR1 0xFFF8_6110 R I 2 C Data Receive Register 1 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
Rx [7:0]
BITS DESCRIPTIONS
[31:8] Reserved Reserved
[7:0] Rx
Data Receive Register
The last byte received via I
2 C bus will put on this register. The I 2 C core
only used 8-bit receive buffer.