Artesyn MVME2502 Installation and Use (April 2015) - Manual (Page 118)

Memory Maps and Registers
MVME2502 Installation and Use (6806800R96E) 118
For more information on LEDs, refer to Table "Front Panel LEDs" on page 59 and Table "On-board
LEDs Status" on page 60 .
5.5.8 PLD PCI/PMC/XMC (Slot1) Monitor Register
The MVME2502 PLD provides an 8-bit register which indicates the status of the PCI/PMC/XMC
interface signals.
Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register
REG PLD PCI_PMC_XMC_MNTR - 0xFFDF001D
Bit 7 6 5 4 3 2 1 0
Field RSVD RSVD MUX1_S
EL_SW SW2-4 PMC1_E
READY PMC1P_
N XMCP1_
N PCI1_PC
IXCAP
OPER R
RESET 0 0 1 X X X X X
Field Description
MUX1_SEL_SW Select for PCIe MUX1 (R/W)
1 - PMC
0 - XMC
SW2-4 SW2-4 state (User defined)
0 - SW2-4 closed
1 - SW2-4 open (default)