Altera POS-PHY Level 4 IP Core - Manual (Page 89)

Chapter 5: Functional Description—Transmitter 5–19
Signals
December 2014 Altera Corporation POS-PHY Level 4 IP Core User Guide
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Table 5–6. Atlantic Buffer Control and Status
Signal Direction Clock Domain Description
ctl_ax_fth[?:0]
Input -
Static
reset
aN_atxclk
FIFO buffer threshold high determines when to
inform the user logic that space is available via the
aN_atxdav
signals. Units are in bytes. Value applies
to all Atlantic buffers. Only change at reset.
ctl_ax_errchk_chkpkt
Input -
Static
reset
Atlantic buffer error checking enable. Disable to
bypass missing SOP and missing EOP detection and
correction. Value applies to all Atlantic buffer levels.
Only change at reset.
err_td_fifo_parityN Output
Indicates that the FIFO buffer has detected a parity
error (one for each Atlantic buffer).
stat_td_fifo_emptyN Output
Indicates that the FIFO buffer has underflowed.
Asserted for one cycle if a buffer read fails because
the buffer is empty (one for each Atlantic interface).
err_aN_fifo_oflwN Output
Indicates that the FIFO buffer has overflowed, and
data has been lost (one for each Atlantic interface).
err_aN_msopN Output
Indicates a missing start of packet error was detected
on the incoming Atlantic interface.
err_aN_meopN Output
Indicates a missing end of packet error was detected
on the incoming Atlantic interface.
stat_aN_mp_erradrN[7:0] Output
Address qualifier for err_aN_meopN and
err_aN_msopN
flags. (Shared Buffer with
Embedded Addressing only.)
Table 5–7. SPI-4.2 Status Channel Control and Status (Part 1 of 3)
Signal Direction Clock Domain Description
ctl_ts_status_mode
Input -
Static reset
tsclk
Controls the filtering of framed status. Set to one to
select optimistic processing of status, otherwise set
to zero for pessimistic processing of status.
Pessimistic behavior only passes status from the last
calendar multiplier in error free frames to the user
and scheduler. Optimistic behavior has the least
latency, passing all status to the user and scheduler
before determining if the status frame is error free.
Only change at reset.
stat_ty_extstat_val Output
txsys_clk
Valid qualifier for the received status value, after
optimistic/pessimistic filtering.
stat_ty_exstat_adr[7:0] Output Port number for the received status value.
stat_ty_exstat[1:0] Output Received status value.