Altera POS-PHY Level 4 IP Core User Manual
Page 52
4–14
Chapter 4: Functional Description—Receiver
Error Flagging and Handling
POS-PHY Level 4 IP Core User Guide
December 2014
Altera Corporation
Reserved control word
Reserved control words:
■
Reserved control word 0 (RSV0) = CTL and
DAT[15:12] == 4’b0101
■
Reserved control word 1 (RSV1) =
CTL and DAT[15:12] == 4’b0011
■
Extension control (EXT) =
CTL and DAT[15:12] == 4’b0001
■
End of control word extension (EOE) = CTL and
DAT[15:12] == 4’b0111
Reserved control words are identified by the assertion of
the stat_rd_rsv_cw signal, which pulses high for a
single rdint_clk clock cycle when a reserved control
word is detected.The payload following the reserved
control word is not written into any buffer.
■
Ignore reserved control words.
■
Assert the stat_rd_rsv_cw for
notification purposes.
■
The payload following the
reserved control word is not
written into the FIFO buffer.
Single DIP-4 error
As part of the SPI-4.2 protocol control word content, the 4-
bit diagonal interleaved parity (DIP-4) is computed over the
current control word and preceding data. A DIP-4 error
occurs when the DIP-4 calculated over the rdat line does
not match the DIP-4 value in the control word.
■
Assert err_rd_dip4 for one
clock cycle.
■
Optionally mark some or all open
packets with an Atlantic error.
(Including packets with DIP-4
error at SOP). The packets have
aN_arxerr
asserted (high).
Table 4–3. SPI-4.2 Protocol Error Handling (Part 2 of 3)
(Note 1)
,
(2)
Error
Condition
Response