Altera POS-PHY Level 4 IP Core - Manual (Page 32)

3–12 Chapter 3: Parameter Settings
Protocol Parameters
POS-PHY Level 4 IP Core User Guide December 2014 Altera Corporation
Protocol Parameters
Figure 3–4 on page 3–12 shows the Protocol Parameters tab.
Select Real-Time Programmable, so most of the protocol parameters on this tab
become input pins to the IP core. These input pins allow each parameter to be
connected to a user-implemented register, and controlled at run-time.
Select Fixed Value, to enter values for the protocol parameters on this tab.
IP Toolbench then fixes these values in the IP core, making the parameters static and
the input pins unavailable.
Calendar Options
Turn on Asymmetric Port Support (only available if you select the Real-time
programmable
) for the calendar to allow asymmetric weighting of calendar entries to
control the allocation of bandwidth to a given SPI-4.2 port. You must program the
calendar for the IP core to produce the status channel (refer to
Appendix E,
Programming the SPI-4.2 Calendar via the Avalon Memory-Mapped Interface ).
A port with twice the calendar entries of all other ports nominally uses twice as much
bandwidth on the SPI-4.2 interface depending on the data characteristics. Ports can be
disabled by removing them from the calendar.
Figure 3–4. Receiver Protocol Parameters