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Error counter clear input – Yaskawa FSP Amplifier User Manual

Page 86

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FSP Amplifier User’s Manual

Chapter 5: Parameter Settings and Functions

5-19

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Error Counter Clear Input

The procedure for clearing the error counter is described below.

Ö Input CLR CN1-15

Clear Input

Position Control

Ö Input /CLR CN1-14

Clear Input

Position Control


The following occurs when the CLR signal is set to high level.

FSP Amplifier

Position loop
error counter

Clear

CLR

• The error counter inside the servo amplifier is set to 0.

• Position loop control is prohibited.

Use this signal to clear the error counter of the host controller or select the
following clear operation through parameter Pn200.1.

Parameter Signal

Setting

Control

Mode

Pn200.1

Error Counter Clear Signal Form

Default Setting: 0

Position Control


Select the pulse form for the error counter clear signal CLR (CN1-15).

Pn200.1

Setting

Description Clear

Timing

0

Clears the error counter when the CLR signal goes high.
Error pulses do not accumulate as long as the signal
remains high.

CLR

( CN1-15)

High

Cleared state

1

Clears the error counter on the rising edge of the CLR
signal.
Clears the error counter only once on the rising edge of
the CLR signal.

CLR
(CN1-15)

High

Cleared only once at this point

2

Clears the error counter when the CLR signal goes low.
Error pulses do not accumulate as long as the signal
remains low.

CLR
(CN1-15)

Low

Cleared state

3

Clears the error counter on the falling edge of the CLR
signal.
Clears the error counter only once on the falling edge of
the CLR signal.

CLR
(CN1-15)

Low

Cleared only once at this point