Zilog Z08470 - Manual (Page 304)

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UM008101-0601 Serial Input/Output
284
Figure 117. Write Register 3
Receiver Bits/Characters 1 and 0 (D7 and D6)
Used together, these bits determine the number of serial receive bits
assembled to form a character. Both bits may be changed during the time
that a character is being assembled, but they must be changed before the
currently programmed number of bits is reached.
Write Register 4
WR4 contains the control bits that affect both the receiver and transmitter.
In the transmit and receive initialization routine, these bits should be set
before issuing WR1, WR3, WR5, WR6, and WR7.
Table 21. Serial Bits/Character
D7 D6 Bits/Character
0 0 5
0 1 7
1 0 6
1 1 8
Rx Enable
SYNC Character Load Inhibit
Address Search Mode (SDLC)
Rx CRC Enable
D7 D6 D5 D4 D3 D2 D1 D0
Enter Hunt Phase
Auto Enables
0 0
0 1
1 0
1 1
Rx 5 Bits/Character
Rx 7 Bits/Character
Rx 6 Bits/Character
Rx 8 Bits/Character