Zilog Z08470 - Manual (Page 28)

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7UGT /CPWCN
UM008101-0601 Counter/Timer Channels
Figure 4. CTC Pin Configuration
Figure 5. Package Configuration
Daisy-Chain
Interrupt
Control
CTC
Control
from CPU
CPU
Data Bus
Z80 CTC
Channel
Signals
CLK +5V GND
CLK/TRG0
ZC/TO0
CLK/TRG1
ZC/TO1
CLK/TRG2
ZC/TO2
CLK/TRG3
RESET
INT
IEO
IEI
RD
IORQ
M1
CS1
CS0
CE
D0
D0
D1
D2
D3
D4
D5
D6
D7
D4
D5
D6
D7
GND
RD
ZC/TO0
ZC/TO1
IZC/TO2
IORQ
IEO
INT
IEI
M1
1
2
3
4
6
7
8
9
10
5
11
12
13
14
D3
D2
D1
D0
+5V
CLK/TRG1
CLK/TRG2
CLK/TRG3
CS1
CS0
RESET
CE
CLK
Z80 CTC
28
27
26
25
23
22
21
20
19
24
18
17
16
15
CLK/TRG0