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Performance limitations, Bus contention, Performance limitations bus contention – Zilog Z08470 User Manual

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UM008101-0601

Direct Memory Access

PERFORMANCE LIMITATIONS

Bus Contention

Using the Direct Memory Access (DMA) as bus master can negatively
effect CPU activity by preventing the CPU from fetching and executing
instructions. This method of bringing the CPU to a halt creates problems,
including:

No interrupt servicing (including nonmaskable CPU interrupts)

No refresh of dynamic memory (if performed by the CPU)

No polling

The CPU’s time-critical functions are affected by which operating mode
the DMA is using. These modes are Byte, Burst, and Continuous.

Byte Mode

When bus contention occurs, using Byte Mode allows interleaving of
CPU functions and DMA functions for each byte of data transferred. The
disadvantage to using this mode is slower transfer speed.

Burst Mode

Burst mode is useful when transferring data in short segments over a
longer period of time. This mode has the advantage of using the bus only
when needed. During those times, transfer speeds are maximized.
However, this mode may not be suitable for extended bursts of data (long
periods when the Ready line is active). Burst mode allows the DMA to
release the bus back to the CPU before other CPU-dependent functions
are compromised.

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