Figure 52. simultaneous transfer, Figure 52 – Zilog Z08470 User Manual

Page 153

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Direct Memory Access

Figure 52.

Simultaneous Transfer

DMA

IORQ RD

WR BUSACK

BAI

RD IORQ

MRD

MWR

HIGH

RD

WR

MEMORY

I/O

DMA

I/O

DECODER

IOCE

IOWR

IORD

Address and Data Buses

RD WR CE

OE

Y1 Y2 Y3 Y4

SEL

1

0

0

0

1

1

0

1

This manual is related to the following products:

Z84015 Z84C00 Z84C10 Z84C15 Z84C20 Z84C30 Z84C40 Z84C41 Z84C42 Z84C43 Z84C44 Z84C90