Altera ALTDQ_DQS2 - Manual (Page 77)

altdq_dqs2_stratixv:altdq_dqs2_inst/input_path_gen[*].read_fifo_hr � INPUT_DFF_*} -
setup -end 0
set_multicycle_path -from {*/altdq_dqs2_stratixv:altdq_dqs2_inst/
input_path_gen[*].capture_reg � LOW_DFF} -to {*/
altdq_dqs2_stratixv:altdq_dqs2_inst/input_path_gen[*].read_fifo_hr � INPUT_DFF_*} -
setup -end 0
FIFO control algorithm is necessary. Consider designing some soft FlFOs for this purpose. The
following paths can only be set to false path or multicycle if there is calibration algorithm in the
system to ensure correct functionalities.
Example 7: set_false_path Commands
#set_false_path -from {*/altdq_dqs2_stratixv:altdq_dqs2_inst/
input_path_gen[*].read_fifo_hr � WRITE_LOAD_DFF_*} -to {*/
altdq_dqs2_stratixv:altdq_dqs2_inst/
input_path_gen[*].read_fifo_hr � READ_LOAD_DFF_*}
Related Information
• FIFO Control on page 21
Describes the hard data valid FlFO and hard latency shifter FlFO of the Arria V and Cyclone V devices.
tq_analysis.tcl
The tq_analysis.tcl is a script that analyzes specific dqdqs I/O timing paths. Because you might be
changing the l/O constraints for your specific implementation, this TCL script helps you to quickly run
specific timing analysis.
Arria V Design Example
This section describes how to instantiate the ALTDQ_DQS2, ALTERA_PLL, ALTDLL, ALT_OCT IP
cores using the Top_AV_13.0sp1.qar design example.
Instantiating the ALTDQ_DQS2 IP Core
To instantiate the ALTDQ_DQS2 IP core, perform the following steps:
1. In the Quartus II software, open the Top_AV_13.0sp1.qar design example and restore the archived
file into your working directory.
2. In the IP Catalog (Tools > IP Catalog), locate and double-click the name of the IP core to customize.
The parameter editor appears.
3. Specify a top-level name for your custom IP variation. This name identifies the IP core variation files
in your project. If prompted, also specify the target Altera device family and output file HDL
preference. Click OK.
4. On the Parameter Settings tab, on the General page, specify the parameters as shown in the following
figure. These parameters configure the general settings for the ALTDQD_DQS2 instance.
UG-01089
2014.12.17
tq_analysis.tcl 77
ALTDQ_DQS2 IP Core User Guide Altera Corporation
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