beautypg.com

Altera ALTDQ_DQS2 User Manual

Page 50

background image

Bit

Bit Name

Default Value (Binary)

Min

Value

Max Value

Inc. Unit

29..28

dqsoutputphasesetting

0

00 = 0°
01 = 45°
10 = 90°
11 = 135°

30

dqsoutputpowerdown

1

31

dqsoutputphaseinvert

0

0 = bypass
1 = enable

33..32

dqoutputphasesetting

0

00 = 0°
01 = 45°
10 = 90°
11 = 135°

35..34

dqoutputpowerdown

10

36

dqoutputphaseinvert

0

0 = bypass
1 = enable

40..37

resyncinputphasesetting
resyncinputpowerdown
resyncinputphaseinvert

100

42..41

postamblephasesetting

0

00 = 0°
01 = 45°
10 = 90°
11 = 135°

44..43

postamblepowerdown

10

45

postamblephaseinvert

0

0 = bypass

1 = enable

50

DQS Configuration Block Bit Sequence for Arria V GZ and Stratix V Devices

UG-01089

2014.12.17

Altera Corporation

ALTDQ_DQS2 IP Core User Guide

Send Feedback