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Table 6-9. enhanced data pointer speed improvement – Maxim Integrated Ultra-High-Speed Flash Microcontroller User Manual

Page 90

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clock cycle has been added to each MOVX instruction (for data access) and to the instruction that follows the MOVX (for code fetch)

to account for potential page misses. The sample code listings have been marked accordingly with ‘+D’ to indicate a data access

page-miss and ‘+C’ to indicate a code-fetch page-miss. Thus, in the case of back-to-back MOVX operations, the second MOVX oper-

ation has two clock cycles added (‘+CD’), one associated with the code fetch and one associated with the data access.

The sample code listings for these programs appear on the following pages.

Program 1 listed below is original code written for an 8051 and utilizes a single data pointer.

Program 2 uses the dual data pointer feature.

Program 3 uses the dual data pointer with autoincrement enhancement.

Program 4 uses the dual data pointer with autotoggle enhancement.

Program 5 uses the dual data pointer with autoincrement and autotoggle enhancements.

The relevant register and bit locations are summarized as follows:

DPL

82h

Low-byte original DPTR

DPH

83h

High-byte original DPTR

DPL1

84h

Low-byte new DPTR

DPH1

85h

High-byte new DPTR

DPS

86h

SEL bit = DPS.0

AID bit = DPS.4

TSL bit = DPS.5

PROGRAM 1: 64-BYTE BLOCK MOVE (WITHOUT DUAL DATA POINTER)

; SH and SL are high and low byte source address.

; DH and DL are high and low byte of destination address.

; For cycle counts:

; HSM = High-Speed Microcontroller

; UHSM = ultra-high-speed microcontroller

# HSM/UHSM CYCLES

MOV

R5, #64

; NUMBER OF BYTES TO MOVE

2/2

MOV

DPTR, #SHSL

; LOAD SOURCE ADDRESS

3/3

MOV

R1, #SL

; SAVE LOW BYTE OF SOURCE

2/2

MOV

R2, #SH

; SAVE HIGH BYTE OF SOURCE

2/2

MOV

R3, #DL

; SAVE LOW BYTE OF DESTINATION

2/2

MOV

R4, #DH

; SAVE HIGH BYTE OF DESTINATION

2/2

MOVE:

Table 6-9. Enhanced Data Pointer Speed Improvement

DS80C320 HIGH SPEED

DS89C420 ULTRA-HIGH SPEED

DATA POINTER OPERATION

CLOCK CYCLES

(4CLKS/MCLK)

EXECUTION TIME

(AT 33MHZ)

CLOCK CYCLES

EXECUTION TIME

(AT 33MHZ)

Single Data Pointer

1869 x 4

227µs

1933

59µs

Dual Data Pointer

1098 x 4

133µs

1291

39µs

Dual Data Pointer w/AID

1169

35µs

Dual Data Pointer w/TSL

910

28µs

Dual Data Pointer w/AID,TSL

782

24µs

Ultra-High-Speed Flash
Microcontroller User’s Guide

Maxim Integrated

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