Extended interrupt priority, Extended interrupt priority 0 (eip0) -39, Extended interrupt priority 0 (eip0) – Maxim Integrated Ultra-High-Speed Flash Microcontroller User Manual

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4-39

R = Unrestricted read, W = Unrestricted write, -n = Value after reset

Extended Interrupt Priority 0 (EIP0)

SFR F8h

—

LPWDI

LPX5

LPX4

LPX3

LPX2

R-1

RW-0

Bits 7–5

LPWDI
Bit 4

LPX5
Bit 3

LPX4
Bit 2

LPX3
Bit 1

LPX2
Bit 0

Reserved. Read data is 1.

Least significant priority select bit for watchdog interrupt. This is the least significant bit of the
bit pair MPWDI (EIP1.4), LPWDI that designates priority level for the watchdog interrupt.

Least significant priority select bit for external interrupt 5. This is the least significant bit of the
bit pair MPX5 (EIP1.3), LPX5 that designates priority level for external interrupt 5.

Least significant priority select bit for external interrupt 4. This is the least significant bit of the
bit pair MPX4 (EIP1.2), LPX4 that designates priority level for external interrupt 4.

Least significant priority select bit for external interrupt 3. This is the least significant bit of the
bit pair MPX3 (EIP1.1), LPX3 that designates priority level for external interrupt 3.

Least significant priority select bit for external interrupt 2. This is the least significant bit of the
bit pair MPX2 (EIP1.0), LPX2 that designates priority level for external interrupt 2.

Table 4-21. Least Significant Priority Select Bit Levels

MP (IP1.X)

LP (IP0.X)

PRIORITY LEVEL

0 (natural priority)

3 (high priority)

Ultra-High-Speed Flash
Microcontroller User’s Guide

Maxim Integrated