Maxim Integrated Ultra-High-Speed Flash Microcontroller - Manual (Page 141)

12-7
Using Timer 2 for Baud-Rate Generation
To use timer 2 as baud-rate generator for serial port 0, the timer is configured in autoreload mode. Then, either the TCLK or RCLK bit
(or both) are set to a logic 1. TCLK = 1 selects timer 2 as the baud-rate generator for the transmitter and RCLK = 1 selects timer 2 for
the receiver. Thus, serial port 0 can have the transmitter and receiver operating at different baud rates by choosing timer 1 for one data
direction and timer 2 for the other. RCLK and TCLK reside in T2CON.4 and TCON.5, respectively.
Although the timer 2 input clock can be configured similarly to timer 1, it must be placed into a baud-rate generator mode in order to
be used by serial port 0. Setting either RCLK or TCLK to a logic 1 selects timer 2 for baud-rate generation. When this is done, the timer
2 input clock becomes fixed to the oscillator frequency divided by 2. This is compatible with the 80C32. The only exception is when
timer 2 is used for baud-rate generation within power-management mode. For PMM, the system clock (OSC/1024) is used as the input
clock for timer 2. The timer 2 interrupt is automatically disabled when either RCLK or TCLK is set. Also, the TF2 (TCON.7) flag is not
set on a timer rollover. The manual reload pin, T2EX (P1.1), does not cause a reload either. Table 12-6 illustrates this relationship.
When using timer 2 to generate baud rates, the formula is as follows. Note that the reload value is a 16-bit number, as compared with
timer 1, which uses only 8 bits. A second equation is provided so that the timer 2 reload value can be calculated for a given baud rate.
Timer 2 input clock frequency can be found in Table 12-6, and RCAP2H, RCAP2L is the user assigned timer 2 reload value.
RCAP2H, RCAP2L = 65536 –
Timer 2 input clock frequency
16 x baud rate
1 Timer 2 input clock frequency
16 (65536–RCAP2H,RCAP2L)
✕
Timer 2 rollover
frequency
Number of serial bits /
Number of timer 2 rollovers
Modes 1, 3 baud rate =
Table 12-6. Timer 2 Baud-Rate Generation
SYSTEM CLOCK MODE
PMR REGISTER BITS
4X/2X, CD1, CD0
TIMER 2 INPUT CLOCK FREQUENCY
BAUD-RATE GENERATOR MODE
(RCLK OR TCLK = 1)
Crystal multiply mode 4X 100 OSC / 2
Crystal multiply mode 2X 000 OSC / 2
Divide-by-1 (default) X01, X10 OSC / 2
Power-management mode (/1024) X11 OSC / 1024
Ultra-High-Speed Flash
Microcontroller User’s Guide
Maxim Integrated