Maxim Integrated Ultra-High-Speed Flash Microcontroller - Manual (Page 140)

12-6
Ultra-High-Speed Flash
Microcontroller User’s Guide
Mode 1 or 3
These asynchronous modes are commonly used for communication with PCs, modems, and other similar interfaces. The baud rates
and bit timing are generated using either timer 1 or timer 2. The respective timer is placed in autoreload mode. When the timer reach-
es its rollover condition (FFFFh - timer 2 or FFh - timer 1), a clock is sent to the baud-rate circuit. The baud-rate circuit generates the
exact baud rate by further dividing the clock by 16 or 32 (depending upon the UART baud-rate doubler bit).
For serial port 0, either timer 1 or 2 can be used to generate baud rates. For serial port 1, only timer 1 can be used as the baud-rate
generator. If operated in mode 1 or 3, the two UARTs may both use timer 1 for baud-rate generation, if desired.
Using Timer 1 for Baud-Rate Generation
To use timer 1 as the baud-rate generator, it is commonly put into the 8-bit autoreload mode. In this way, the CPU is not involved in
baud-rate generation. Note that the timer interrupt should not be enabled. In the 8-bit autoreload mode (timer 1, mode 2), the reload
value is stored in TH1. Thus, the combination of timer 1 input clock frequency and TH1 determine the baud rate.
The timer 1 input clock, relative to the external crystal clock, can be altered in two ways: 1) changing the system clock, or 2) chang-
ing the timer input clock divide ratio. Modifying the system clock is accomplished using the clock divide bits (CD1:0) found in the PMR
special function register. This procedure is discussed in Section 5. The timer 1 input clock divide ratio is configurable using the T1M
(CKCON.4) and T1MH (CKMOD.4) register bits. Setting the T1MH bit to a logic 1 results in the system clock being used to clock timer
1. When T1MH is clear ( = 0), setting the T1M bit to a logic 1 provides the system clock divided by 4 input to timer 1. When both T1M
and T1MH are logic 0, the Timer 1 input clock is fixed at the oscillator frequency divided by 12. When using power-management mode,
setting either T1MH or T1M to a logic 1 results in the system clock (OSC/1024) being used as the input clock to timer 1. While, if both
bits are clear ( = 0) in power-management mode, the system clock divided by 3 (OSC/3072) is provided to timer 1. Table 12-5 sum-
marizes the relationship between the external crystal frequency and the timer 1 input clock for the various configurations.
Using timer 1 in the 8-bit autoreload mode, serial port baud rates for mode 1 or 3 can be calculated using the formula below.
Timer 1 input clock frequency can be found in the previous table, SMOD_x is the logic state of the baud-rate doubler bit for the asso-
ciated UART, and TH1 is the user assigned timer 1 reload value.
Often, users already know what baud rate is desired and only need to calculate the timer reload value. An equation to calculate the
timer reload value, TH1, is as follows:
Note that the 8-bit, autoreload mode for timer 1 is the one most commonly used for serial port applications, but that it can actually be configured in any mode, even as a counter.
TH1 = 256 -
32 x baud rate
2 SMOD_x x timer 1 input clock frequency
Timer 1 input clock frequency
Modes 1, 3 baud rate =
32
x
2 SMOD_x
(256 - TH1)
Timer 1 rollover
frequency
Number of serial bits /
Number of timer 1 rollovers
Table 12-5. Timer 1 Input Clock Frequency
TIMER 1
INPUT CLOCK FREQUENCY SYSTEM CLOCK MODE
PMR REGISTER BITS
4X/2X, CD1, CD0
T1MH,T1M = 00 T1MH,T1M = 01 T1MH,T1M = 1X
Crystal multiply mode 4X 100 OSC / 12 OSC / 1 OSC / 0.25
Crystal multiply mode 2X 000 OSC / 12 OSC / 2 OSC / 0.5
Divide-by-1 (default) X01, X10 OSC / 12 OSC / 4 OSC / 1
Power-management mode (/1024) X11 OSC / 3072 OSC / 1024 OSC / 1024
Maxim Integrated