Maxim Integrated Ultra-High-Speed Flash Microcontroller - Manual (Page 34)

4-26
Ultra-High-Speed Flash
Microcontroller User’s Guide
INT0
Bit 2
TXD0
Bit 1
RXD0
Bit 0
External Interrupt 0. A falling edge/low level on this pin causes an external interrupt 0 if enabled.
Serial Port 0 Transmit. This pin transmits the serial port 0 data in serial port modes 1, 2, 3 and
emits the synchronizing clock in serial port mode 0.
Serial Port 0 Receive. This pin receives the serial port 0 data in serial port modes 1, 2, 3 and is a
bidirectional data transfer pin in serial port mode 0.
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
Interrupt Priority 1 (IP1)
7 6 5 4 3 2 1 0
SFR B1h — MPS1 MPT2 MPS0 MPT1 MPX1 MPT0 MPX0
R-1 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
IP17.0
Bit 7
MPS1
Bit 6
MPT2
Bit 5
MPS0
Bit 4
MPT1
Bit 3
MPX1
Bit 2
MPT0
Bit 1
MPX0
Bit 0
Reserved. Read data is 1.
Most Significant Priority Select Bit for Serial Port 1 Interrupt. This is the most significant bit of
the bit pair MPS1, LPS1 (IP0.6) that designates priority level for the serial port 1 interrupt.
Most Significant Priority Select Bit for Timer 2 Interrupt. This is the most significant bit of the
bit pair MPT2, LPT2 (IP0.5) that designates priority level for the timer 2 interrupt.
Most Significant Priority Select Bit for Serial Port 0 Interrupt. This is the most significant bit of
the bit pair MPS0, LPS0 (IP0.4) that designates priority level for the serial port 0 interrupt.
Most Significant Priority Select Bit for Timer 1 Interrupt. This is the most significant bit of the
bit pair MPT1, LPT1 (IP0.3) that designates priority level for the timer 1 interrupt.
Most Significant Priority Select Bit for External Interrupt 1. This is the most significant bit of the
bit pair MPX1, LPX1 (IP0.2) that designates priority level for external interrupt 1.
Most Significant Priority Select Bit for Timer 0 Interrupt. This is the most significant bit of the
bit pair MPT0, LPT0 (IP0.1) that designates priority level for the timer 0 interrupt.
Most Significant Priority Select Bit for External Interrupt 0. This is the most significant bit of the
bit pair MPX0, LPX0 (IP0.0) that designates priority level for external interrupt 0.
Interrupt priority level for the above sources is assigned using one bit from register IP1 (B1h) and
one bit from IP0 (B8h). The bit from IP1 serves as the most significant bit and the bit from IP0 serves
as the least significant bit in forming a 2-bit binary number. This number represents the priority level.
Higher priority interrupts, when enabled, take precedence over lower priority sources. The power-
fail warning interrupt source is assigned priority level 4.
Table 4-13. Most Significant Priority Select Bit Levels
MP (IP1.X) LP (IP0.X) PRIORITY LEVEL
0 0 0 (natural priority)
0 1 1
1 0 2
1 1 3 (high priority)
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