Timer 2 mode (t2mod), Timer 2 capture lsb (rcap2l), Timer 2 capture lsb (rcap2h) – Maxim Integrated Ultra-High-Speed Flash Microcontroller User Manual
Page 42: Timer 2 mode (t2mod) -34, Timer 2 capture lsb (rcap2l) -34, Timer 2 capture lsb (rcap2h) -34
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Ultra-High-Speed Flash
Microcontroller User’s Guide
CP/
RL2
Bit 0
Capture/Reload Select. This bit determines whether the capture or reload function is used for
Timer 2. When set (= 1), Timer 2 captures occur when a falling edge is detected on T2EX(P1.1) if
EXEN2 = 1. When clear (= 0), Timer 2 functions in an autoreload mode. An autoreload occurs fol-
lowing each overflow if RCLK or TCLK is set or if a falling edge is detected on T2EX if EXEN2 = 1.
0 = Autoreloads occur when Timer 2 overflows or a falling edge is detected on T2EX if EXEN2 = 1.
1 = Timer 2 captures occur when a falling edge is detected on T2EX if EXEN2 = 1.
T2MOD 7–2
Bits 7–2
T2OE
Bit 1
DCEN
Bit 0
Reserved. Read data is 1.
Timer 2 Output Enable. This bit enables/disables the clock output function of the T2 pin (P1.0).
When set (= 1), Timer 2 drives the T2 pin with a clock output if C/(T2CON.1) = 0. For this setting,
Timer 2 rollovers do not cause interrupts. When clear (= 0), the T2 pin functions as either a standard
port pin or as a counter input for Timer 2.
Down Count Enable. This bit, in conjunction with the T2EX (P1.1) pin, controls the direction that
Timer 2 counts in 16-bit autoreload mode.
RCAP2L.7–0
Bits 7–0
Timer 2 Capture LSB. This register is used to capture the TL2 value when Timer 2 is configured
in capture mode. RCAP2L is also used as the LSB of a 16-bit reload value when Timer 2 is configured
in autoreload mode.
RCAP2H.7–0
Bits 7–0
Timer 2 Capture MSB. This register is used to capture the TH2 value when Timer 2 is configured
in capture mode. RCAP2H is also used as the MSB of a 16-bit reload value when Timer 2 is con-
figured in autoreload mode.
DCEN
T2EX
DIRECTION
1
1
Up
1
0
Down
0
X
Up
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
Timer 2 Capture LSB (RCAP2H)
7
6
5
4
3
2
1
0
SFR CBh
RCAP2H.7
RCAP2H.6
RCAP2H.5
RCAP2H.4
RCAP2H.3
RCAP2H.2
RCAP2H.1
RCAP2H.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
Timer 2 Capture LSB (RCAP2L)
7
6
5
4
3
2
1
0
SFR CAh
RCAP2L.7
RCAP2L.6
RCAP2L.5
RCAP2L.4
RCAP2L.3
RCAP2L.2
RCAP2L.1
RCAP2L.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
Timer 2 Mode (T2MOD)
7
6
5
4
3
2
1
0
SFR C9h
—
—
—
—
—
—
T2OE
DCEN
R-1
R-1
R-1
R-1
R-1
R-1
RW-0
RW-0
Maxim Integrated