Electro Cam PL-1746 Series - Manual (Page 33)

3-3 How to Program the PLS
Backplane Programming (cont'd)
ERROR NUMBER REGISTER (I:S.6)
When an error is reported and the Any Error bit in the Programming Error Register is set, the register number of the
command that caused the error is placed in the Error Number Register. This register is available from the PL-1746 in it’s
input file at location I:S.6 (unless I:S.6 is mapped).
HARDWARE STATUS/ERROR REGISTER (I:S.5 - PL-1746-C02/C03 models only)
When a hardware fault error occurs, the PL-1746 turns off outputs, lights the Fault LED, shows a fault code on the local
display, and indicates a fault by setting the Any Fault bit and a fault-specific bit in the Hardware Status/Error Register
(I:S.5). The user must clear the fault via the Clear Error bit (O:S.0/8), or via turning the SLC-500 keyswitch to PROG and
back to RUN. If the fault condition remains, it will again be flagged in the same manner. In all cases, the Hardware
Status/Error Register is only updated if it's unmapped. An error message appears on the keypad/display, but clearing it
has no effect on the internal status of the fault.
The Hardware Status/Error Register bits are defined as follows:
Bit Local Display Description
15 ---- Any Fault
14 EX0F Reserved
13 EX0E System Busy
12 EX0D I/O power supply failed
11 EX0C SLC queue overflow
10 EX0B SLC access timer time-out
9 EX0A SLC fatal error
8 EX09 SLC interface pipe is full
7 EX08 SLC backplane overflow
6 EX07 Resolver not ok
5 EX06 NMI without PWRFAIL_
4 EX05 Interrupt from unused vector
3 ---- Reserved
2 ---- Reserved
1 ---- Reserved
0 ---- Reserved
The SLC program should assume the C02 is not ready for data whenever the System Busy bit is set. This can happen,
for example, during startup and when the user changes scale factor. Unlike the other status bits, the System Busy bit
and the Any Error bit (I:S.5/15) cannot be cleared by the SLC program; in this instance these bits are cleared by the C02
only. Also, when the system is busy, it doesn't turn off outputs, doesn't light the fault LED, and doesn't show anything on
the local display. The SLC program should be continuously monitoring both the Programming Error Register's Any Error
bit (I:S.7/15) and the Hardware Status/Error Register's Any Error bit, and taking appropriate action if either is set.
INPUT STATUS REGISTER 0:S.0
0:S.0/15 0:S.0/14 0:S.0/13 0:S.0/12 0:S.0/11 0:S.0/10 0:S.0/9 0:S.0/8
Clear Clear
Shift Reg. Error
0:S.0/7 0:S.0/6 0:S.0/5 0:S.0/4 0:S.0/3 0:S.0/2 0:S.0/1 0:S.0/0
Output 1st Cycle Group 5 Group 4 Group 3 Group 2 Group 1 Group 0
Enable Enable Input Input Input Input Input Input
For GROUP "X" INPUT and 1ST CYCLE ENABLE see Chapter 6: Groups and Modes.
OUTPUT ENABLE
This input enables Channels that have their output anding enable bit set; those channels
will be turned off when this bit is low.
CLEAR ERROR
Toggle this bit ON to clear the "Any Error" bit in the Programming Error Register (I:S.7).