Comtech EF Data SNM-1010L - Manual (Page 176)

SNM-1010L Data/Control Modem Revision 0
Theory of Operation MN/SNM1010L.OM
6.4.1 Theory of Operation
The demodulator card functions as an advanced, fully digital, coherent phase-lock
receiver, and a Viterbi decoder.
6.4.1.1 Continuous Mode
The demodulator consists of the following subsections:
• RF synthesizer
• IF amplifier
• Quadrature demodulator
• Identical anti-aliasing filters
• Analog-to-Digital converters
• Digital Nyquist filters
• Costas loop
• Clock loop
• AGC
• AOC
• Ambiguity resolver
• Soft-decision decoder
• V.35 descrambler
• BER monitor
The modulated signal enters the RF module, where it is converted from an IF signal at
50 through 180 MHz to I&Q baseband channels. The synthesizer has multiple loops, and
incorporates a DDS chip to accommodate 100 Hz steps over a range of 130 MHz. The RF
section has a frequency stability of
± 1 x 10 -5 .
•
The two channels are then passed through identical anti-aliasing filters Analog-to-Digital
converters, and digital Nyquist filters. The result is a filtered, digital representation of the
received signal. A Costas loop maintains the phase lock during the message. A phase-
lock loop maintains the data clock. The soft-decision mapper converts the I&Q samples
to
soft-decision values. The soft-decision values are then fed to the Viterbi decoder where
error detection and correction are performed.
The I&Q channels also are used to calculate the AGC and AOC voltages. The AGC and
AOC are fed back to the RF module.
The data from the output of the Viterbi decoder is descrambled with a V.35 descrambler,
and routed to the interface card. Additionally, a summary fault relay provides a FORM C
output located on the demodulator board.
During acquisition, the demodulator sweeps the range around the nominal IF frequency.
These parameters (sweep width and offset) can be set by the user. As the demodulator
sweeps through a carrier, the data is fed to the selected decoder, which resolves the
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