Comtech EF Data SNM-1010L - Manual (Page 170)

SNM-1010L Data/Control Modem Revision 0
Theory of Operation MN/SNM1010L.OM
6.3.1 Theory of Operation
The modulator is composed of two basic sections: the baseband processing section, and
the RF section. The modem M&C controls all programmable functions in both sections.
6.3.1.1 Burst Mode
When a transmission is initiated, the modulator issues a pure carrier for 96 clock cycles,
followed by a clock training sequence for 352 clock cycles. A 31-bit unique word is then
transmitted.
The user data is transmitted into the modem. When the modulator detects the end of the
user data stream, the modulator flushes the convolutional encoder (6 bits), then transmits
the unique word prime twice (62 bits). The packet is complete and the modulator is ready
for the next packet.
Data to be transmitted comes from the DAC. At this point, the data signal is clean and
free of jitter. The data signal goes to the scrambler, which provides energy dispersal.
There is no need for a differential encoder in burst mode, as the ambiguities are resolved
using the unique word. The data signal passes to the 1/2 rate Viterbi K=7 convolutional
encoder.
The output of the encoder generates two separate data streams to drive the in-phase and
quadrature channels of the modulator. The data signal passes through a set of variable-
rate digital Nyquist filters. There are activity detectors on both the In-phase and
Quadrature (I&Q) channel Nyquist filters.
The digital Nyquist filters are followed by Digital-to-Analog converters and
reconstruction filters. These filters provide proper spectral shaping and equalization. The
filters are under control of the M&C.
The I&Q filtered data signals are applied to the RF modulator, which converts them to a
modulated carrier. The spectral shape is identical to that of the input data streams, but is
double-sided about the carrier frequency.
The RF synthesizer provides the proper frequencies to convert the modulator IF to the
desired output frequency in the 50 through 180 MHz range. The synthesizer has multiple
loops, and incorporates a Direct Digital Synthesis (DDS) chip to accommodate 100 Hz
steps over a range of 130 MHz. The RF section has a frequency stability of
± 1 x 10 -5 .
The signal from the power combiner is sent to the output amplifier, which amplifies the
low-level signal from the modulator section to the proper level for output from the
module. The amplifier contains circuitry which provides programmable control of the
output level over a range of -5.0 to -30.0 dBm, in 0.1 dB graduated steps. Power leveling
is provided at
± 1.0 dB to maintain the stability of the output level over time and
temperature.
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