Altera Arria 10 Avalon-ST - Manual (Page 33)

Figure 3-2: Configuration Bypass Qsys System
1. Note the following parameter settings for the Configuration Space Bypass Example Design:
• For the DUT, the Enable Configuration Bypass parameter is turned on under the System Settings
banner.
• The Base Address Registers specify BAR0 as 1 MByte - 20 bits of 64-bit prefetchable memory for
each function. In Configuration Space Bypass Mode, the BAR registers inside the Hard IP for PCI
Express are not used. The Application Layer implements the Configuration Space for each function.
• For testbench compatibility, the Config-Bypass App Example, labeled APPs, must retain a Device ID
of 0xE001 (57345
10
) and a Vendor ID of 0x1172 (4466
10
).
Generating the Qsys System
On the Qsys Generate menu, select Generate Testbench System. Specify the parameters listed in the
following table.
UG-01145_avst
2014.08.18
Generating the Qsys System 3-3
Getting Started with the Configuration Space Bypass Mode Qsys Example Design Altera Corporation
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