Top-level interfaces, Avalon-st interface, Top-level interfaces -3 – Altera Arria 10 Avalon-ST User Manual
Page 167: Avalon-st interface -3
The following interfaces provide access to the Application Layer’s Configuration Space Registers:
• The LMI interface
• The Avalon-MM PCIe reconfiguration interface, which can access any read-only Configuration Space
Register
• In Root Port mode, you can also access the Configuration Space Registers with a Configuration TLP
using the Avalon-ST interface. A Type 0 Configuration TLP is used to access the Root Port configura‐
tion Space Registers, and a Type 1 Configuration TLP is used to access the Configuration Space
Registers of downstream components, typically Endpoints on the other side of the link.
The Hard IP includes dedicated clock domain crossing logic (CDC) between the PHYMAC and Data Link
Layers.
Related Information
Top-Level Interfaces
Avalon-ST Interface
An Avalon-ST interface connects the Application Layer and the Transaction Layer. This is a
point-to-point, streaming interface designed for high throughput applications. The Avalon-ST interface
includes the RX and TX datapaths.
For more information about the Avalon-ST interface, including timing diagrams, refer to the Avalon
Interface Specifications.
RX Datapath
The RX datapath transports data from the Transaction Layer to the Application Layer’s Avalon-ST
interface. Masking of non-posted requests is partially supported. Refer to the description of the
rx_st_mask
signal for further information about masking.
TX Datapath
The TX datapath transports data from the Application Layer's Avalon-ST interface to the Transaction
Layer. The Hard IP provides credit information to the Application Layer for posted headers, posted data,
non-posted headers, non-posted data, completion headers and completion data.
The Application Layer may track credits consumed and use the credit limit information to calculate the
number of credits available. However, to enforce the PCI Express Flow Control (FC) protocol, the Hard
IP also checks the available credits before sending a request to the link, and if the Application Layer
violates the available credits for a TLP it transmits, the Hard IP blocks that TLP and all future TLPs until
credits become available. By tracking the credit consumed information and calculating the credits
available, the Application Layer can optimize performance by selecting for transmission only the TLPs
that have credits available.
Related Information
•
•
•
UG-01145_avst
2014.08.18
Top-Level Interfaces
11-3
IP Core Architecture
Altera Corporation