Freescale Semiconductor DSP56366 - Manual (Page 95)

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 6-1
6 Host Interface (HDI08)
6.1 Introduction
The host interface (HDI08) is a byte-wide, full-duplex, double-buffered, parallel port that can be connected
directly to the data bus of a host processor. The HDI08 supports a variety of buses and provides glueless
connection with a number of industry standard microcomputers, microprocessors, DSPs and DMA
hardware.
The host bus can operate asynchronously to the DSP core clock, therefore the HDI08 registers are divided
into 2 banks. The host register bank is accessible to the external host and the DSP register bank is
accessible to the DSP core.
The HDI08 supports three classes of interfaces:
• Host processor/Microcontroller (MCU) connection interface
• DMA controller interface
• General purpose I/O (GPIO) port
6.2 HDI08 Features
6.2.1 Interface - DSP side
• Mapping:
— Registers are directly mapped into eight internal X data memory locations
• Data Word:
— 24-bit (native) data words are supported, as are 8-bit and 16-bit words
• Transfer Modes:
— DSP to Host
— Host to DSP
— Host Command
• Handshaking Protocols:
— Software polled
— Interrupt driven
— Core DMA accesses
• Instructions:
— Memory-mapped registers allow the standard MOVE instruction to be used to transfer data
between the DSP and the external host.
— Special MOVEP instruction provides for I/O service capability using fast interrupts.