Freescale Semiconductor DSP56366 - Manual (Page 350)

Programming Sheets
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
D-42 Freescale Semiconductor
Figure D-27. ESAI_1 Status Register
15
654
19
18
17
16
10
9
8
7
14
13
12
11
IF0
32
10
IF2
23
22
21
20
IF
1
RFS
RD
F
De
scri
pt
ion
Descriptio
n
0 1
H
ol
ds
d
ata
se
nt
fr
om
S
C
K
R
_1
pi
n.
SAISR_1 - ESAI_1
Status Registe
r
Y: $F
FFF93 Reset $000000
RF
S
D
escript
ion
0 1
Receive frame
sync did
not occur
Descrip
tion
Reser
ved
IF
[0:2]
Re
se
rv
ed
RO
E
H
old
s d
ata
s
en
t fr
om HC
KR_1
pi
n.
Ho
ld
s da
ta
se
nt
fr
om
FS
R_1
pi
n.
2
during wor
d reception
Receive fr
ame sync did occur
dur
ing w
ord r
ecept
ion
RO
E
Descript
ion
0 1
No
receiver
over
run er
ror
Re
ceive
r overr
un err
or
RDF
Descrip
tio
n
0 1
R
eceive data r
egister
empty
R
eceive data r
egister
full
RE
DF
RO
DF
TFS
TUE
TDE
TE
D
E
TODE
REDF
Desc
ri
p
tio
n
0 1
Receive even-
data re
gister em
pty
Receive even-
data re
gister fu
ll
TO
DE
D
escript
ion
0 1
T
ransmit odd-da
ta register not emp
ty
Tr
ansmit od
d-data r
egister
empty
TFS
Descript
ion
0 1
Tran
smit Fr
ame sync did not
occu
r during w
ord tr
ansmission
Tr
ansmit fr
ame sync occur
red d
uring wor
d transmission
T
U
E
D
escrip
tio
n
0 1
No tran
smit under
run er
ror
Tran
smit under
run er
ror
TD
E
D
escrip
tion
0 1
T
ransmit data re
gisters not emp
ty
T
ransmit data re
gisters empty
TED
E
Descrip
tion
0 1
T
ransmit eve
n-data r
egister
s n
ot empty
T
ransmit eve
n-data r
egister
s e
m
pty
Descrip
tio
n
Re
se
rv
ed
RODF
Descrip
tion
0 1
R
eceive odd-d
ata register empty
R
eceive odd-d
ata register full
Application: Date:
Programmer:
T
ransmit odd-da
ta register not emp
ty
ESAI_1