Freescale Semiconductor DSP56366 - Manual (Page 35)

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 2-1
2 Signal/Connection Descriptions
2.1 Signal Groupings
The input and output signals of the DSP56364 are organized into functional groups, which are listed in
Table 2-1 and illustrated in Figure 2-1 .
The DSP56364 is operated from a 3.3 V supply; however, some of the inputs can tolerate 5 V. A special
notice for this feature is added to the signal descriptions of those inputs.
Table 2-1 DSP56364 Functional Signal Groupings
Functional Group
Number of
Signals
Detailed
Description
Power (V
CC
) 20
Table 2-2
Ground (GND) 18
Table 2-3
Clock and PLL 3
Table 2-4
Address bus
Port A
1
1
Port A is the external memory interface port, including the external address bus, data bus, and control signals.
18
Table 2-5
Data bus 24
Table 2-6
Bus control 10
Table 2-7
Interrupt and mode control 5
Table 2-8
HDI08 Port B 2
2
Port B signals are the GPIO port signals which are multiplexed with the HDI08 signals.
16
Table 2-9
SHI 5
Table 2-10
ESAI Port C
3
3 Port C signals are the GPIO port signals which are multiplexed with the ESAI signals.
12
Table 2-11
ESAI_1 Port E
4
4 Port E signals are the GPIO port signals which are multiplexed with the ESAI_1 signals.
6
Table 2-12
Digital audio transmitter (DAX) Port D 5
5
Port D signals are the GPIO port signals which are multiplexed with the DAX signals.
2
Table 2-13
Timer 1
Table 2-14
JTAG/OnCE Port 4
Table 2-15