Freescale Semiconductor DSP56366 - Manual (Page 32)

Peripheral Overview
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
1-8 Freescale Semiconductor
ALU. Memory space includes internal RAM and ROM and can be expanded off-chip under software
control.
There is an instruction cache, made using program RAM. The patch mode (which uses instruction cache
space) is used to patch program ROM. The memory switch mode is used to increase the size of program
RAM as needed (switch from X data RAM and/or Y data RAM).
There are on-chip ROMs for program memory (40K × 24-bit), bootstrap memory (192 words × 24-bit), X
ROM (32K × 24-bit), and Y ROM(8K × 24-bit).
More information on the internal memory is provided in Section 3, "Memory Configuration" .
1.4.9 Off-Chip Memory Expansion
Memory can be expanded off-chip as follows:
• Data memory can be expanded to two 16 M × 24-bit word memory spaces in 24-bit address mode
(64K in 16-bit address mode).
• Program memory can be expanded to one 16 M × 24-bit word memory space in 24-bit address
mode (64K in 16-bit address mode).
Other features of external memory expansion include the following:
• External memory expansion port
• Chip-select logic glueless interface to static random access memory (SRAM)
• On-chip dynamic RAM (DRAM) controller for glueless interface to DRAM
• Eighteen external address lines
1.5 Peripheral Overview
The DSP56366 is designed to perform a wide variety of fixed-point digital signal processing functions. In
addition to the core features previously discussed, the DSP56366 provides the following peripherals:
• 8-bit parallel host interface (HDI08, with DMA support) to external hosts
• As many as 37 user-configurable general purpose input/output (GPIO) signals
• Timer/event counter (TEC) module, containing three independent timers
• Memory switch mode in on-chip memory
• Four external interrupt/mode control lines and one external non-maskable interrupt line
• Enhanced serial audio interface (ESAI) with up to four receivers and up to six transmitters, master
or slave, using the I
2
S, Sony, AC97, network, and other programmable protocols
• A second enhanced serial audio interface (ESAI_1) with 6 dedicated pins.
• Serial host interface (SHI) using SPI and I
2
C protocols, with multi-master capability, 10-word
receive FIFO, and support for 8-, 16-, and 24-bit words
• Digital audio transmitter (DAX): a serial transmitter capable of supporting the SPDIF, IEC958,
CP-340, and AES/EBU digital audio formats