11 tcr transmit frame sync length (tfsl) - bit 15, Tcr transmit frame sync length (tfsl) - bit 15 -19 – Freescale Semiconductor DSP56366 User Manual
Page 169
ESAI Programming Model
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor
8-19
8.3.2.11
TCR Transmit Frame Sync Length (TFSL) - Bit 15
The TFSL bit selects the length of frame sync to be generated or recognized. If TFSL is cleared, a
word-length frame sync is selected. If TFSL is set, a 1-bit clock period frame sync is selected. See
for examples of frame length selection.
0
1
0
1
1
Reserved
0
1
1
1
0
1
0
0
0
1
1
0
0
1
1
1
0
1
0
0
1
0
1
1
0
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
Table 8-5 ESAI Transmit Slot and Word Length Selection (continued)
TSWS4
TSWS3
TSWS2
TSWS1
TSWS0
SLOT LENGTH
WORD LENGTH