Freescale Semiconductor DSP56366 - Manual (Page 352)

Programming Sheets
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
D-44 Freescale Semiconductor
Figure D-29. DAX Control and Status Registers
XB
LK
DA
X
B
lock t
ransf
er
0
not last frame
1
1
91st f
rame tr
ansmission
DAX
15
1
4
13
1
2
1
1
10
98
76
54
321
0
DAX Control
X:
$F
FF
FD0
Res
et
= $0
00
00
0
Register (XC
T
R)
*
0
*
0
*
0
*
0
*
0
* =
Reser
ved; write as 0
16
17
18
19
20
21
22
23
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XC
S1
XC
S0
XBIE
X
U
IE
X
D
IE
15
1
4
13
1
2
11
10
9
8
7
6
5
4
3
2
1
0
*
0
*
0
*
0
*
0
*
0
*
0
16
17
18
19
20
21
22
23
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XBL
K
XAD
E
*
0
*
0
*
0
*
0
*
0
*
0
X
C
S1
XCS0
DAX Clock Source
0
0
DSP Cor
e Clock (f
=
10
24 x
fs)
0
1
ACI Pin, f = 256 x fs
1
0
ACI Pin, f = 384 x fs
1
1
ACI Pin, f = 512 x fs
DA
X Sta
tus
X:
$F
FF
FD4
R
es
et = $0
00
00
0
Re
g
is
ter (X
ST
R)
XAD
E
DAX Au
dio
Data
Em
pt
y
0
R
egister(
s)
full
1
R
egister(
s)
empty
XAUR
DAX U
nde
rr
u
n
error
0N
o e
rr
or
1
U
nderr
un err
or
*
0
*
0
*
0
*
0
*
0
*
0
*
0
*
0
XAU
R
XBIE DAX B
lock T
ra
n
s. In
t. Ena
b
le
0D
is
a
bl
ed
1
E
nabled
XU
IE DAX Un
derrun
Int. Enable
0
Disabled
1
Enable
d
XDIE Au
d. Da
t. Reg
. Emp
. Int. En.
0
D
isabled
1
E
nabled
X
S
B
DA
X St
ar
t
Bl
o
ck
0
D
isabled
1
F
orce Block Start
XS
B
Application: Date:
Programmer: