Freescale Semiconductor DSP56366 - Manual (Page 69)

Internal I/O Memory Map
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 3-13
DMA1 X:$FFFFEB DMA SOURCE ADDRESS REGISTER (DSR1)
X:$FFFFEA DMA DESTINATION ADDRESS REGISTER (DDR1)
X:$FFFFE9 DMA COUNTER (DCO1)
X:$FFFFE8 DMA CONTROL REGISTER (DCR1)
DMA2 X:$FFFFE7 DMA SOURCE ADDRESS REGISTER (DSR2)
X:$FFFFE6 DMA DESTINATION ADDRESS REGISTER (DDR2)
X:$FFFFE5 DMA COUNTER (DCO2)
X:$FFFFE4 DMA CONTROL REGISTER (DCR2)
DMA3 X:$FFFFE3 DMA SOURCE ADDRESS REGISTER (DSR3)
X:$FFFFE2 DMA DESTINATION ADDRESS REGISTER (DDR3)
X:$FFFFE1 DMA COUNTER (DCO3)
X:$FFFFE0 DMA CONTROL REGISTER (DCR3)
DMA4 X:$FFFFDF DMA SOURCE ADDRESS REGISTER (DSR4)
X:$FFFFDE DMA DESTINATION ADDRESS REGISTER (DDR4)
X:$FFFFDD DMA COUNTER (DCO4)
X:$FFFFDC DMA CONTROL REGISTER (DCR4)
DMA5 X:$FFFFDB DMA SOURCE ADDRESS REGISTER (DSR5)
X:$FFFFDA DMA DESTINATION ADDRESS REGISTER (DDR5)
X:$FFFFD9 DMA COUNTER (DCO5)
X:$FFFFD8 DMA CONTROL REGISTER (DCR5)
PORT D X:$FFFFD7 PORT D CONTROL REGISTER (PCRD)
X:$FFFFD6 PORT D DIRECTION REGISTER (PRRD)
X:$FFFFD5 PORT D DATA REGISTER (PDRD)
DAX X:$FFFFD4 DAX STATUS REGISTER (XSTR)
X:$FFFFD3 DAX AUDIO DATA REGISTER B (XADRB)
X:$FFFFD2 DAX AUDIO DATA REGISTER A (XADRA)
X:$FFFFD1 DAX NON-AUDIO DATA REGISTER (XNADR)
X:$FFFFD0 DAX CONTROL REGISTER (XCTR)
X:$FFFFCF Reserved
X:$FFFFCE Reserved
X:$FFFFCD Reserved
X:$FFFFCC Reserved
X:$FFFFCB Reserved
X:$FFFFCA Reserved
PORT B X:$FFFFC9 HOST PORT GPIO DATA REGISTER (HDR)
X:$FFFFC8 HOST PORT GPIO DIRECTION REGISTER (HDDR)
Table 3-4 Internal I/O Memory Map (continued)
Peripheral Address Register Name