Freescale Semiconductor DSP56366 - Manual (Page 309)

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor D-1
Appendix D Programmer’s Reference
D.1 Introduction
This section has been compiled as a reference for programmers. It contains a table showing the addresses
of all the DSPs memory-mapped peripherals, an interrupt address table, an interrupt exception priority
table, a quick reference to the host interface, and programming sheets for the major programmable
registers on the DSP.
D.1.1 Peripheral Addresses
Table D-1 lists the memory addresses of all on-chip peripherals.
D.1.2 Interrupt Addresses
Table D-2 lists the interrupt starting addresses and sources.
D.1.3 Interrupt Priorities
Table D-3 lists the priorities of specific interrupts within interrupt priority levels.
D.1.4 Host Interface Quick Reference
Table D-4 is a quick reference guide to the host interface (HDI08).
D.1.5 Programming Sheets
The remaining figures describe major programmable registers on the DSP56366.
D.2 Internal I/O Memory Map