Figure d-4, Central processor – Freescale Semiconductor DSP56366 User Manual
Page 327

Programming Sheets
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor
D-19
Figure D-4. Interrupt Priority Register – Peripherals (IPR–P)
Application:
Date:
Programmer:
Sheet 4 of 5
CENTRAL PROCESSOR
*
=
Re
se
rve
d
, Pro
g
ram
as
0
Interrupt P
riority
X:
$F
FF
FF
E R/W
Res
e
t =
$
000
000
R
e
gi
ste
r (I
PR
–P)
ESL1
ESL0
E
nabled
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
ESAI IPL
SHL1
SHL0
Enabled
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
SHI IPL
1
5
1
4
1
3
1
2
1
1
1
0
9876543210
HDL1
HDL
0
S
HL1
S
H
L
0
E
SL
1
ESL0
23
22
21
20
19
18
16
17
DAL
0
DAL1
TAL0
TAL1
*
0
*
0
*
0
*
0
$0
*
0
*
0
*
0
*
0
$0
*
0
*
0
*
0
*
0
$0
HD
L1
H
D
L0
Ena
b
led
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
HDI08 IPL
DA
L1
DAL
0
E
n
a
bled
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
DA
X IPL
T
A
L1
TA
L0
Enab
led
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
TEC I
P
L
ES
L1
ES
L0
Ena
b
led
IPL
00
N
o
—
01
Y
e
s
0
10
Y
e
s
1
11
Y
e
s
2
ESAI_1 IPL
ES
L1
0
ES
L
1
1