Comtech EF Data SDM-650B - Manual (Page 22)

Table of Contents SDM-650B Satellite Modem
xviii Rev. 5
Figures
Figure 1-1. SDM-650B....................................................................................................................................1–1
Figure 1-2. Satellite Communications System with an SDM-650B ................................................................1–2
Figure 1-3. Modular Construction ...................................................................................................................1–4
Figure 1-4. Sequential Decoder BER Performance Curves (1/2 Rate)............................................................1–8
Figure 1-5. Sequential Decoder BER Performance Curves (3/4 Rate)............................................................1–9
Figure 1-6. Sequential Decoder BER Performance Curves (7/8 Rate)..........................................................1–10
Figure 1-7. Viterbi Decoder BER Performance Curves (1/2 Rate) ...............................................................1–11
Figure 1-8. SDM-650B Typical Output Spectrum ........................................................................................1–12
Figure 2-1. SDM-650B Rear Panel View........................................................................................................2–2
Figure 3-1. M&C Card ....................................................................................................................................3–2
Figure 3-2. RS-422 and MIL-STD-188-114 Interface Board..........................................................................3–7
Figure 3-3. RS-422 and MIL-STD-188-114 Block Diagram ..........................................................................3–8
Figure 3-4. V.35 Interface Card.....................................................................................................................3–14
Figure 3-5. V.35 Interface Block Diagram ....................................................................................................3–15
Figure 3-6. DS-1 Interface Card ....................................................................................................................3–20
Figure 3-7. DS-1 Interface Block Diagram....................................................................................................3–21
Figure 3-8. G.703 2048 kbit/s Interface Card................................................................................................3–24
Figure 3-9. G.703 2048 Interface Block Diagram .........................................................................................3–25
Figure 3-10. G.703 2048 kbit/s Interface Connector Board (Optional).........................................................3–28
Figure 3-11. G.703 2048 kbit/s Connector Board Schematic Diagram .........................................................3–29
Figure 3-12. Asynchronous Overhead Interface Block Diagram ..................................................................3–32
Figure 3-13. Asynchronous Overhead Jumpers.............................................................................................3–33
Figure 3-14. AS/3812 Doppler Buffer Daughter Card ..................................................................................3–43
Figure 3-15. Clock Slip Diagram...................................................................................................................3–45
Figure 3-16. RS-422 or V.35 Master Slave Configuration............................................................................3–51
Figure 3-17. G.703 Master Slave Configuration ...........................................................................................3–53
Figure 3-18. X.21 Master/Slave Configuration .............................................................................................3–54
Figure 3-19. G.703 Master Slave Configuration ...........................................................................................3–55
Figure 3-20. Master/Master Customer Clock Configuration .........................................................................3–56
Figure 3-21. Master/Master Station Clock Configuration Diagram ..............................................................3–58
Figure 4-1. SDM-650B Front Panel View.......................................................................................................4–2
Figure 5-1. Modulator Block Diagram ............................................................................................................5–2
Figure 5-2. Modulator Output Spectral Occupancy.........................................................................................5–4
Figure 5-3. Decoder Block Diagram................................................................................................................5–7
Figure 5-4. Sequential Decoder BER Performance Curves (1/2 Rate)..........................................................5–13
Figure 5-5. Sequential Decoder BER Performance Curves (3/4 Rate)..........................................................5–14
Figure 5-6. Sequential Decoder BER Performance Curves (7/8 Rate)..........................................................5–15
Figure 5-7. Demodulator Block Diagram ......................................................................................................5–16
Figure 6-1. Typical Output Spectrum ..............................................................................................................6–4
Figure 6-2. Typical Output Spectrum ..............................................................................................................6–4
Figure 6-3. Typical Eye Pattern with Noise (Approximately 7.5 dB E
b
/N
0
) ...................................................6–6
Figure 6-4. Typical Eye Pattern without Noise ...............................................................................................6–6
Figure 6-5. Typical Eye Constellation with Noise (Approximately 7.5 dB E
b
/N
0
) .........................................6–7
Figure 6-6. Typical Eye Constellation without Noise......................................................................................6–7
Figure 6-7. Modulator Test Points...................................................................................................................6–8
Figure 6-8. Demodulator Test Points...............................................................................................................6–9
Figure 6-9. Sequential Decoder/Demod Card Test Points.............................................................................6–10
Figure 6-10. Rear View Without Cover.........................................................................................................6–20
Figure A-1. Modulator Filter Card Change ....................................................................................................A–2
Figure A-2. Demodulator Filter Card Change ................................................................................................A–4