Altera Serial Digital Interface (SDI) MegaCore Function - Manual (Page 9)

Chapter 1: About This MegaCore Function 1–3
General Description
February 2013 Altera Corporation Serial Digital Interface (SDI) MegaCore Function
User Guide
General Description
The Society of Motion Picture and Television Engineers (SMPTE) have defined an SDI
that video system designers use widely as an interconnect between equipment in
video production facilities.
The SDI MegaCore function can handle the following SDI data rates:
■ 270 megabits per second (Mbps) SD-SDI, as defined by SMPTE259M-1997 10-Bit
4:2:2 Component Serial Digital Interface
■ 1.5-Gbps HD-SDI, as defined by SMPTE292M-1998 Bit-Serial Digital Interface for
High Definition Television Systems
■ 3-Gbps SDI, as defined by SMPTE425M-AB 2006 3Gb/s Signal/Data Serial Interface–
Source Image Format Mapping
■ Preliminary support for dual link SDI, as defined by SMPTE372M-Dual Link
1.5Gb/s Digital Interface for 1920×1080 and 2048×1080 Picture Formats
Cyclone ® Final (3)
Cyclone II (2) Final
Cyclone III (2) Final
Cyclone III LS (2) Final
Cyclone IV GX (4) Final
Cyclone V (5)
Refer to the What’s New in Altera IP page of
the Altera website.
HardCopy ® III/ IV E HardCopy Compilation
HardCopy IV GX HardCopy Compilation
Stratix ® (2) Final
Stratix GX Final
Stratix II (2) Final
Stratix II GX Final
Stratix III (2) Final
Stratix IV (1) Final
Stratix V (1)
Refer to the What’s New in Altera IP page of
the Altera website.
Other device families No support
Notes to Table 1–4 :
(1) If you have only 27 MHz to drive the SDI MegaCore function in SD-SDI mode, you require an additional PLL to
generate a 67.5-MHz reference clock.
(2) The Cyclone series of devices, and Stratix, Stratix II, and Stratix III devices only support soft
serializer /deserializer (SERDES).
(3) Cyclone device support is limited to –6 speed grade devices.
(4) Transceiver dynamic configuration with channel reconfiguration mode is not supported for dual and triple standard
in EP4CGX110 and EP4CGX150 devices. Use transceiver dynamic reconfiguration with PLL reconfiguration mode
instead.
(5) The Cyclone V devices does not support the SDI Audio IP cores.
Table 1–4. Device Family Support (Part 2 of 2)
Device Family Support