Altera Serial Digital Interface (SDI) MegaCore Function - Manual (Page 84)

3–54 Chapter 3: Functional Description
Signals
Serial Digital Interface (SDI) MegaCore Function February 2013 Altera Corporation
User Guide
Table 3–19 lists the signals that handle the transceiver dynamic reconfiguration
operation.
Table 3–19. Transceiver Dynamic Reconfiguration Signals (Part 1 of 2)
Signal Direction Description
SDI_RECONFIG_DONE Input
Indicates back to MegaCore function that reconfiguration has
finished. This signal is not required for PLL reconfiguration.
SDI_RECONFIG_TOGXB (1) , (3) , (4) Input
Data input for the embedded transceiver instance. (2) , (5)
Data width:
■ For all devices except Arria V, Cyclone V, and Stratix V =
SDI_RECONFIG_TOGXB[3:0]
■ SDI_RECONFIG_TOGXB[3] is negligible for Arria GX and
Stratix II GX.
■ For Arria V, Cyclone V, and Stratix V devices =
SDI_RECONFIG_TOGXB[(140N-1)]:0]
or
SDI_RECONFIG_TOGXB[(70N-1)]:0] —if the receiver in the
interface settings is selected.
SDI_RECONFIG_CLK (3) Input
Clock input for the embedded transceiver instance. (2)
This signal is not applicable for Arria V, Cyclone V, and Stratix V
devices.
SDI_GXB_POWERDOWN Input
Powers down and resets circuits in all transceiver instance. (6)
This signal is not applicable for Arria V, Cyclone V, and Stratix V
devices.
SDI_START_RECONFIG Output Request from MegaCore function to start reconfiguration.
SDI_RECONFIG_FROMGXB (1) , (3) , (4) Output
Data output from embedded transceiver instance. (2) , (5)
Data width:
■ For all devices except Arria V, Cyclone V, and Stratix V =
SDI_RECONFIG_FROMGXB[(17N-1):0]
■ SDI_RECONFIG_FROMGXB[16:1] are negligible for Arria GX
and Stratix II GX
■ SDI_RECONFIG_FROMGXB[16:5] are negligible for
Cyclone IV GX
■ For Arria V, Cyclone V, and Stratix V devices =
SDI_RECONFIG_FROMGXB[(92N-1):0]
or
SDI_RECONFIG_FROMGXB[(46N-1):0] if the receiver in the
interface settings is selected.
RX_STD[1:0] Output
Receive video standard. 00 = SD-SDI, 01 = HD-SDI, 10 = 3G-SDI.
The SDI MegaCore function can recover both SMPTE 425M-A and
425M-B formatted streams. The receiver indicates which format it
detects by setting the level of the rx_std bus:
■ rx_std[1:0] = 2’b11 = 425M-A
■ rx_std[1:0] = 2’b10 = 425M-B
PLL_ARESET
(7) , (8) , (9)
Input
Drives the areset signal on the transceiver PLL to be
reconfigured. This signal indicates that the transceiver PLL must
be reset.
PLL_CONFIGUPDATE
(7) , (8) , (9)
Input
Drives the configupdate signal on the transceiver PLL to be
reconfigured.