Epson ARM.POWERED ARM720T - Manual (Page 77)

5: Write Buffer
ARM720T CORE CPU MANUAL EPSON 5-1
5 Write Buffer
This chapter describes the write buffer. It contains the following sections:
5.1 About the write buffer................................................................................ 5-1
5.2 Write buffer operation................................................................................ 5-2
5.1 About the write buffer
The write buffer of the ARM720T processor is provided to improve system performance. It can
buffer up to:
• eight words of data
• eight independent addresses.
You can enable and disable the write buffer using the W bit, bit 3, in the Control Register. The
buffer is disabled and flushed on reset.
The operation of the write buffer is further controlled by the
Bufferable (B) bit, which is stored
in the MMU page tables. For this reason, the MMU must be enabled before using the write
buffer. The two functions can, however, be enabled simultaneously, with a single write to the
Control Register.
For a write to use the write buffer, both the W bit in the Control Register and the B bit in the
corresponding page table must be set.
Note:
It is not possible to abort buffered writes externally. The error response on
HRESP[1:0] is ignored. Areas of memory that can generate aborts must be marked
as unbufferable in the MMU page tables.
5.1.1 Bufferable bit
This bit controls whether a write operation uses or does not use the write buffer. Typically,
main memory is bufferable and I/O space unbufferable. The B bit can be configured for both
pages and sections.