Epson ARM.POWERED ARM720T - Manual (Page 36)

1: Introduction
1-16 EPSON ARM720T CORE CPU MANUAL
Shift/Rotate Logical shift left LSL , , #<5bit_shift_imm> LSL
,
Logical shift right LSR , , #<5bit_shift_imm> LSR
,
Arithmetic shift right ASR , , #<5bit_shift_imm> ASR
,
Rotate right ROR ,
Branch Conditional
if Z set BEQ
if Z clear BNE
if C set BCS
if C clear BCC
if N set BMI
if N clear BPL
if V set BVS
if V clear BVC
if C set, and Z clear BHI
if C clear, and Z set BLS
if N set, and V set, or if N
clear, and V clear BGE
if N set, and V clear, or if
N clear, and V set BLT
if Z clear, and N, or V set,
or if Z clear, and N, or V
clear BGT
if Z set, or N set, and V
clear, or N clear, and V
set BLE
Unconditional B
Long branch with link BL
Optional state change
to address held in Lo reg BX
to address held in Hi reg BX
Load With immediate offset
word LDR , [, #<7bit_offset>]
halfword LDRH , [, #<6bit_offset>]
byte LDRB , [, #<5bit_offset>]
Table 1-12 Thumb instruction summary (continued)
Operation Assembler