Epson ARM.POWERED ARM720T - Manual (Page 190)

11: Test Support
11-6 EPSON ARM720T CORE CPU MANUAL
The CAM match, RAM read format for data is shown in Figure 11-9.
Figure 11-9 Data format, CAM match RAM read
11.4.1 Addressing the CAM and RAM
For the CAM read or write, and RAM read or write operations you must specify the segment,
index, and word (for the RAM operations). The CAM and RAM operations use the value in the
victim pointer for that segment, so you must ensure that the value is written in the victim
pointer before any CAM or RAM operation.
If the MCR write victim and lockdown base is used, then the victim pointer is incremented
after every CAM read or write, and every RAM read or write. If the MCR write victim is used,
then the victim pointer is only incremented after every CAM read or write. This enables
efficient reading or writing of the CAM and RAM for an entire segment. The write cache victim
and lockdown operations are shown in Table 11-4.
The write cache victim and lockdown base format for Rd is shown in Figure 11-10.
Figure 11-10 Rd format, write cache victim and lockdown base
The write cache victim format for Rd is shown in Figure 11-11.
Figure 11-11 Rd format, write cache victim
Another cache test register, C15.C, is written with the current victim of the addressed segment
whenever an MCR CAM read is executed. This is intended for use in debug to establish the
value of the current victim pointer of each segment before reading the values of the CAM and
RAM, so that the value can be restored afterwards.
Table 11-4 Write cache victim and lockdown operations
Operation Instructions
Write cache victim and lockdown base MCR p15, 0, , c9, c0, 0
MCR p15, 0, , c9, c0, 1
Write cache victim MCR p15, 0, , c9, c1, 0
MCR p15, 0, , c9, c1, 1
Hit
RAM data word [29:0]
31 29 30
Miss
0
31 0
SBZ Index
25 26
Seg
31 7 6 5 4 0
SBZ SBZ Index
26 25