Epson ARM.POWERED ARM720T - Manual (Page 179)

10: ETM Interface
ARM720T CORE CPU MANUAL EPSON 10-1
10 ETM Interface
This chapter describes the ETM interface that is provided on the ARM720T processor. It
contains the following sections:
10.1 About the ETM interface ......................................................................... 10-1
10.2 Enabling and disabling the ETM7 interface........................................... 10-1
10.3 Connections between the ETM7 macrocell and the ARM720T processor......... 10-2
10.4 Clocks and resets...................................................................................... 10-3
10.5 Debug request wiring............................................................................... 10-3
10.6 TAP interface wiring ................................................................................ 10-3
10.1 About the ETM interface
You can connect an external Embedded Trace Macrocell (ETM) to the ARM720T processor, so
that you can perform real-time tracing of the code that the processor is executing.
In general, little or no glue logic is required to connect the ETM7 to the ARM720T processor.
You program the ETM through a JTAG interface. The interface is an extension of the ARM
TAP controller, and is assigned scan chain 6.
Note:
If you have more than one ARM processor in your system, each processor must have
its own dedicated ETM.
See the
ETM7 (Rev 1) Technical Reference Manual for detailed information about
integrating an ETM7 with an ARM720T processor.
10.2 Enabling and disabling the ETM7 interface
Under the control of the ARM debug tools, the ETM7 PWRDOWN output is used to enable and
disable the ETM. When PWRDOWN is HIGH, this indicates that the ETM is not currently
enabled, so you can stop the CLK input and hold the other ETM signals stable. This enables
you to reduce power consumption when you are not performing tracing.
When a TAP reset (nTRST) occurs, PWRDOWN is forced HIGH until the ETM7 control
register has been programmed (see the Embedded Trace Macrocell Specification for details of
this register).
PWRDOWN is automatically cleared at the start of a debug session.
On the ARM720T processor, the ETM interface pins are gated by the ETMEN input. This
means that if the ETMEN input is LOW, all the output pins of the ETM interface remain
stable. You can control this ETMEN input by connecting it with either of the following:
• the ETMEN output on the ETM7
• the inverted PWRDOWN output on the ETM7.