Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

Mentor, Verification ip altera, Edition amba axi3/4

Table of contents

Document Outline

Table of Contents
List of Examples
List of Figures
List of Tables
Preface
- About This User Guide
- AMBA AXI Protocol Specification
- Protocol Restrictions
- Supported Simulators
- Simulator GCC Requirements
- AXI3 and AXI4 Syntax References
Chapter 1 Mentor VIP Altera Edition
- Advantages of Using BFMs and Monitors
- Implementation of BFMs
- What Is a Transaction?
- An AXI Transaction
  - AXI Write Transaction Master and Slave Roles
  - AXI Read Transaction Master and Slave Roles
Chapter 2 SystemVerilog API Overview
- Configuration
  - set_config()
  - get_config()
- Creating Transactions
  - Transaction Record
  - create*_transaction()
- Executing Transactions
  - execute_transaction(), execute*_burst(), execute*_phase()
- Waiting Events
  - wait_on()
  - get*_transaction(), get*_burst(), get*_phase(), get*_cycle()
- Access Transaction Record
  - set*()
  - get*()
- Operational Transaction Fields
Chapter 3 SystemVerilog AXI3 and AXI4 Master BFMs
- Master BFM Protocol Support
- Master Timing and Events
- Master BFM Configuration
- Master Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- SystemVerilog Master API
Chapter 4 SystemVerilog AXI3 and AXI4 Slave BFMs
- Slave BFM Protocol Support
- Slave Timing and Events
- Slave BFM Configuration
- Slave Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- SystemVerilog Slave API
- Helper Functions
Chapter 5 SystemVerilog AXI3 and AXI4 Monitor BFMs
- Inline Monitor Connection
- Monitor BFM Protocol Support
- Monitor Timing and Events
- Monitor BFM Configuration
- Monitor Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- SystemVerilog Monitor API
- Helper Functions
Chapter 6 SystemVerilog Tutorials
- Verifying a Slave DUT
  - AXI3 BFM Master Test Program
  - AXI4 BFM Master Test Program
- Verifying a Master DUT
  - AXI3 BFM Slave Test Program
  - AXI4 BFM Slave Test Program
Chapter 7 VHDL API Overview
- Configuration
  - set_config()
  - get_config()
- Creating Transactions
  - Transaction Record
    - AXI4 Transaction Definition
  - create*_transaction()
- Executing Transactions
  - execute_transaction(), execute*_burst(), execute*_phase()
- Waiting Events
  - wait_on()
  - get*_transaction(), get*_burst(), get*_phase(), get*_cycle()
- Access Transaction Record
  - set*()
  - get*()
- Operational Transaction Fields
Chapter 8 VHDL AXI3 and AXI4 Master BFMs
- Overloaded Procedure Common Arguments
- Master BFM Protocol Support
- Master Timing and Events
- Master BFM Configuration
- Master Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- VHDL Master API
Chapter 9 VHDL AXI3 and AXI4 Slave BFMs
- Slave BFM Protocol Support
- Slave Timing and Events
- Slave BFM Configuration
- Slave Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- VHDL Slave API
- Helper Functions
Chapter 10 VHDL AXI3 and AXI4 Monitor BFMs
- Inline Monitor Connection
- Monitor BFM Protocol Support
- Monitor Timing and Events
- Monitor BFM Configuration
- Monitor Assertions
  - AXI3 Assertion Configuration
  - AXI4 Assertion Configuration
- VHDL Monitor API
Chapter 11 VHDL Tutorials
- Verifying a Slave DUT
  - AXI3 BFM Master Test Program
  - AXI4 BFM Master Test Program
- Verifying a Master DUT
Chapter 12 Getting Started with Qsys and the BFMs
- Setting Up Simulation from a UNIX Platform
- Setting Up Simulation from the Windows GUI
Appendix A Assertions
- AXI3 Assertions
- AXI4 Assertions
Appendix B SystemVerilog AXI3 and AXI4 Test Programs
- SystemVerilog AXI3 Master BFM Test Program
- SystemVerilog AXI3 Slave BFM Test Program
- SystemVerilog AXI4 Master BFM Test Program
- SystemVerilog AXI4 Slave BFM Test Program
Appendix C VHDL AXI3 and AXI4 Test Programs
- VHDL AXI3 Master BFM Test Program
- VHDL AXI4 Master BFM Test Program
- VHDL AXI4 Slave BFM Test Program
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