Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 166)

Mentor VIP AE AXI3/4 User Guide, V10.2b 148
SystemVerilog Tutorials
Verifying a Slave DUT
September 2013
Example 6-11. Write Transaction Creation and Execution
/************************
** Traffic generation: **
************************/
// 4 x Writes
// Write data value 1 on byte lanes 1 to address 1.
trans = bfm.create_write_transaction(1);
trans.set_data_words(32'h0000_0100, 0);
trans.set_write_strobes(4'b0010, 0);
$display ( "@ %t, master_test_program: Writing data (1) to address (1)",
$time);
// By default it will run in Blocking mode
bfm.execute_transaction(trans);
In the complete Master Test Program, three subsequent write transactions are created and
executed in a similar manner to that shown in
Example 6-11 . See SystemVerilog AXI4 Master
BFM Test Program for details.
Read Transaction Creation and Execution
The code excerpt in Example 6-12 reads the data that has been previously written into the slave
memory. The Master Test Program first creates a read transaction trans by calling the
create_read_transaction() function, providing only the start address argument. The burst-length
argument automatically defaults to a value of zero—indicating a burst length of a single beat
(refer to
“create_read_transaction()” on page 47 for more details).
The set_id() function is then called to set the transaction id field to be 1 before executing the
read transaction trans onto the protocol signals with a call to the
execute_transaction() function.
The read data is obtained by calling the get_data_words(0) function to get the data_words[0]
transaction field value. The result of the read data is compared with the expected data—and a
message displays the transcript.
Example 6-12. Read Transaction Creation and Execution
// Read data from address 1.
trans = bfm.create_read_transaction(1);
trans.set_size(AXI4_BYTES_1);
trans.set_id(1);
bfm.execute_transaction(trans);
if (trans.get_data_words(0) == 32'h0000_0100)
$display ( "@ %t, master_test_program: Read correct data (1) at
address (1)", $time);
else
$display ( "@ %t master_test_program: Error: Expected data (1) at
address 1, but got %d", $time, trans.get_data_words(0));