Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 655)

VHDL Tutorials
Verifying a Master DUT
Mentor VIP AE AXI3/4 User Guide, V10.2b 635
September 2013
The main difference between write and read transaction handling is that the read transaction
retrieves the read data burst from the internal memory mem at the start of the data burst, or on a
phase-by-phase (beat-by-beat) basis, depending on the
slave_mode configuration setting. In
addition AXI3 has a read response per read data phase (beat), so unlike the write, read does not
require a separate read response handling process (refer to
Example 11-28 and Example 11-29 ).
Example 11-28. process_read
-- process_read : read address phase through path 3
-- This process keep receiving read address phase and push the
transaction into queue through
-- push_transaction_id API.
process
variable read_trans: integer;
begin
set_config
(
AXI_CONFIG_MAX_OUTSTANDING_RD, m_max_outstanding_read_trans, index,
axi_tr_if_0(index)
);
wait_on(AXI_RESET_0_TO_1, index, AXI_PATH_3, axi_tr_if_3(index));
wait_on(AXI_CLOCK_POSEDGE, index, AXI_PATH_3, axi_tr_if_3(index));
loop
create_slave_transaction(read_trans, index, AXI_PATH_3,
axi_tr_if_3(index));
set_read_address_ready_delay(read_trans, AXI_PATH_3,
axi_tr_if_3(index));
get_read_addr_phase(read_trans, index, AXI_PATH_3,
axi_tr_if_3(index));
push_transaction_id(read_trans, AXI_QUEUE_ID_1, index, AXI_PATH_3,
axi_tr_if_3(index));
end loop;
wait;
end process;