Axi3 example, Axi4 example – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual
Page 66

Mentor VIP AE AXI3/4 User Guide, V10.2b
48
SystemVerilog AXI3 and AXI4 Master BFMs
create_read_transaction()
September 2013
AXI3 Example
// Create a read data burst length of 3 (4 beats) to start address 16.
trans = bfm.create_read_transaction(16, 3);
trans.set_size = (AXI_BYTES_4);
AXI4 Example
// Read data burst length of 3 to start address 16.
trans = bfm.create_read_transaction(16, 3);
trans.set_size = (AXI4_BYTES_4);
prot
Protection:
**_NORM_SEC_DATA; (default)
**_PRIV_SEC_DATA;
**_NORM_NONSEC_DATA;
**_PRIV_NONSEC_DATA;
**_NORM_SEC_INST;
**_PRIV_SEC_INST;
**_NORM_NONSEC_INST;
**_PRIV_NONSEC_INST;
Burst ID
data_words
Data words array.
resp
Burst response:
**_OKAY;
**_EXOKAY;
**_SLVERR;
**_DECERR;
Operational
Transaction
Fields
operation_mode
Operation mode:
**_TRANSACTION_NON_BLOCKING;
**_TRANSACTION_BLOCKING; (default)
delay_mode
(AXI3) Delay mode:
AXI_VALID2READY; (default)
AXI_TRANS2READY;
address_valid_delay
Address channel ARVALID delay measured in ACLK
cycles for this transaction (default = 0).
data_ready_delay
Read data channel RREADY delay array measured in
ACLK cycles for this transaction (default = 0 for all
elements).
data_beat_done
Write data channel beat done flag array for this
transaction.
transaction_done
Read transaction done flag for this transaction.
Returns
*_transaction
The transaction record: