Master assertions, Axi3 assertion configuration – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual
Page 225
VHDL AXI3 and AXI4 Master BFMs
Master Assertions
Mentor VIP AE AXI3/4 User Guide, V10.2b
207
September 2013
1.
Refer to
for details of simulator time-steps.
Master Assertions
Each master BFM performs protocol error checking via built-in assertions.
Note
The built-in BFM assertions are independent of programming language and simulator.
AXI3 Assertion Configuration
By default all built-in assertions are enabled in the master BFM. To globally disable them in the
master BFM, use the
command as the following example illustrates.
set_config(AXI_CONFIG_ENABLE_ALL_ASSERTIONS,0,bfm_index,
axi_tr_if_0(bfm_index));
Alternatively, you can disable individual built-in assertions by using a sequence of
and
commands on the respective assertion. For example, to disable assertion
checking for the AWLOCK signal changing between the AWVALID and AWREADY handshake
signals, use the following sequence of commands:
-- Define a local bit vector to hold the value of the assertion bit vector
variable config_assert_bitvector : std_logic_vector(AXI_MAX_BIT_SIZE-1
downto 0);
**_CONFIG_SLAVE_START_ADDR
Configures the start address map for the
slave.
**_CONFIG_SLAVE_END_ADDR
Configures the end address map for the
slave.
**_CONFIG_READ_DATA_REORDERING_DEPTH
The slave read reordering depth. Refer to
the AMBA AXI Protocol specification for
more details. Default: 1.
Error Detection
**_CONFIG_ENABLE_ALL_ASSERTIONS
Global enable/disable of all assertion
checks in the BFM.
0 = disabled
1 = enabled (default)
**_CONFIG_ENABLE_ASSERTION
Individual enable/disable of assertion check
in the BFM.
0 = disabled
1 = enabled (default)
Table 8-2. Master BFM Configuration (cont.)
Configuration Field
Description