Get_write_addr_phase(), Axi3 example, Transaction by calling the – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual
Page 470: M test program using

Mentor VIP AE AXI3/4 User Guide, V10.2b
450
VHDL AXI3 and AXI4 Slave BFMs
get_write_addr_phase()
September 2013
get_write_addr_phase()
This blocking procedure gets a write address phase uniquely identified by the transaction_id
argument previously created by the
procedure.
Note
For AXI3 the get_write_addr_phase() also sets the AWREADY protocol signal at the
appropriate time defined by the transaction record address_ready_delay field.
AXI3 Example
-- Create a slave transaction. Creation returns tr_id to identify
-- the transaction.
create_slave_transaction(tr_id, bfm_index, axi_tr_if_0(bfm_index));
....
-- Get the write address phase of the tr_id transaction.
get_write_addr_phase(tr_id, bfm_index, axi_tr_if_0(bfm_index));
Prototype
-- * = axi| axi4
-- ** = AXI | AXI4
procedure get_write_addr_phase
(
transaction_id : in integer;
bfm_id : in integer;
path_id : in *_path_t; -- Optional
signal tr_if : inout *_vhd_if_struct_t
);
Arguments
transaction_id
Transaction identifier. Refer to
on page 203 for more details.
bfm_id
on page 203 for more details.
path_id
(Optional) Parallel process path identifier:
**_PATH_0
**_PATH_1
**_PATH_2
**_PATH_3
**_PATH_4
Refer to
“Overloaded Procedure Common Arguments”
page 203 for more details.
tr_if
Transaction signal interface. Refer to
on page 203 for more
details.
Returns
None