Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 353)

VHDL AXI3 and AXI4 Master BFMs
execute_write_resp_ready()
Mentor VIP AE AXI3/4 User Guide, V10.2b 335
September 2013
execute_write_resp_ready()
This AXI4 procedure executes a write response ready by placing the ready argument value onto
the BREADY signal. It will block for one ACLK period.
AXI3 BFM
Note
The execute_write_resp_ready() task is not available in the AXI3 BFM. Use the
get_write_response_phase() task along with the transaction record
write_response_ready_delay field.
AXI4 Example
-- Set the BREADY signal to 1 and block for 1 ACLK cycle
execute_write_resp_ready(1, 1, index, AXI4_PATH_5, axi4_tr_if_5(index));
Prototype procedure execute_write_resp_ready
(
ready : in integer;
non_blocking_mode : in integer; --optional
bfm_id : in integer;
path_id : in axi4_path_t; --optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments ready The value to be placed onto the BREADY signal
non_blocking_mode (Optional) Nonblocking mode:
0 = Nonblocking
1 = Blocking (default)
bfm_id BFM identifier. Refer to “Overloaded Procedure Common
Arguments” on page 203 for more details.
path_id (Optional) Parallel process path identifier:
AXI4_PATH_0
AXI4_PATH_1
AXI4_PATH_2
AXI4_PATH_3
AXI4_PATH_4
Refer to “Overloaded Procedure Common Arguments” on page 203
for more details.
tr_if Transaction signal interface. Refer to “Overloaded Procedure
Common Arguments” on page 203 for more details.
Returns None