Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM - Manual (Page 484)

Mentor VIP AE AXI3/4 User Guide, V10.2b 464
VHDL AXI3 and AXI4 Slave BFMs
execute_write_data_ready()
September 2013
execute_write_data_ready()
This AXI4 procedure executes a write data ready by placing the ready argument value onto the
WREADY signal. It blocks for one ACLK period.
AXI3 BFM
Note
The execute_write_data_ready() task is not available in the AXI3 BFM. Use the
get_write_data_phase() task along with the transaction record address_ready_delay
field.
AXI4 Example
-- Set the WREADY signal to 1 and block for 1 ACLK cycle
execute_write_data_ready(1, 1, index, AXI4_PATH_7, axi4_tr_if_7(index));
Prototype procedure execute_write_data_ready
(
ready : in integer;
bfm_id : in integer;
path_id : in axi4_path_t; --optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments transaction_id Transaction identifier. Refer to “Overloaded Procedure
Common Arguments” on page 203 for more details.
non_blocking_mode (Optional) Nonblocking mode:
0 = Nonblocking
1 = Blocking (default)
bfm_id BFM identifier. Refer to “Overloaded Procedure Common
Arguments” on page 203 for more details.
path_id (Optional) Parallel process path identifier:
AXI4_PATH_0
AXI4_PATH_1
AXI4_PATH_2
AXI4_PATH_3
AXI4_PATH_4
Refer to “Overloaded Procedure Common Arguments” on
page 203 for more details.
tr_if Transaction signal interface. Refer to “Overloaded Procedure
Common Arguments” on page 203 for more details.
Returns None