Axi read transaction master and slave roles, Figure 1-3. slave write transaction phases, Figure 1-3 – Altera Mentor Verification IP Altera Edition AMBA AXI3/4TM User Manual

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An AXI Transaction

September 2013

Figure 1-3. Slave Write Transaction Phases

The slave then executes a write response phase by calling the

execute_write_response_phase()

task and completes its role in the write transaction.

AXI Read Transaction Master and Slave Roles

Note

The following description of a read transaction references the SystemVerilog BFM API
tasks. There are equivalent VHDL BFM API procedures that perform the same
functionality.

A read transaction is similar to a write transaction. The master initiates the read by calling the

create_read_transaction()

and

execute_transaction()

tasks. The execute_transaction() calls the

the

execute_read_addr_phase()

task followed by the

get_read_data_burst()

task. The

get_read_data_burst() calls the

get_read_data_phase()

task for each phase (beat) of the burst

defined by a burst_length transaction field, as illustrated in

Figure 1-4